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1 document # eeprom101 rev a revised may 2007 features access times of 200, 250, 300 and 350 ns single 5v10% power supply simple byte and page write low power cmos: - 60 ma active current - 200 a standby current fast write cycle times p6c28c64 8k x 8 eeprom description the p6c28c64 is a 5 volt 8kx8 eeprom using floating gate cmos technology. the device supports 64-byte page write operation. the p6c28c64 features data and toggle bit polling as well as a system software scheme used to indicate early completion of a write cycle. the device also includes user-optional software data protec- tion. endurance is 10,000 or 100,000 cycles and data retention is 100 years. the device is available in a 32-pin lcc package as well as a 28-pin 600 mil wide ceramic dip. functional block diagram pin configurations 1519b dip (c5-1) lcc (l6) software data protection fully ttl compatible inputs and outputs endurance: 10,000 or 100,000 cycles data retention: 100 years available in the following packages: ? 32-pin ceramic lcc (450 x 550 mils) ? 28-pin 600 mil ceramic dip
p6c28c64 page 2 of 11 document # eeprom101 rev a maximum ratings (1) symbol parameter value unit v cc power supply pin with ?0.3 to +6.25 v respect to gnd terminal voltage with ?0.5 to v term respect to gnd +6.25 v (up to 6.25v) t a operating temperature ?55 to +125 c symbol parameter value unit t bias temperature under ?55 to +125 c bias t stg storage temperature ?65 to +150 c p t power dissipation 1.0 w i out dc output current 50 ma recommended operating temperature and supply voltage i sb standby power supply current (ttl input levels) ce v ih , oe = v il , v cc = max, f = max., outputs open ___ 3 250 ma a ___ ce v hc , v cc = max, f = 0, outputs open v in v lc or v in v hc standby power supply current (cmos input levels) i sb1 grade (2) ambient temperature gnd v cc 0v 5.0v 10% ?55c to +125c military symbol c in c out parameter input capacitance output capacitance conditions v in = 0v v out = 0v 10 10 unit pf pf capacitances (4) v cc = 5.0v, t a = 25c, f = 1.0mhz symbol dc electrical characteristics over recommended operating temperature and supply voltage (2) v ih v il v hc v lc v ol v oh i li i lo parameter input high voltage input low voltage cmos input high voltage cmos input low voltage output low voltage (ttl load) output high voltage (ttl load) input leakage current output leakage current test conditions i ol = +8 ma, v cc = min. i oh = ?4 ma, v cc = min. v cc = max. v in = gnd to v cc v cc = max., ce = v ih , v out = gnd to v cc p5c164 min 2.0 ?0.5 (3) v cc ?0.2 ?0.5 (3) 2.4 ?10 ?10 v cc +0.3 0.8 v cc +0.5 0.2 0.4 +10 +10 max unit v v v v v v a a notes: 1. stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to maximum rating conditions for extended periods may affect reliability. 2. extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. transient inputs with v il and i il not more negative than ?3.0v and ?100ma, respectively, are permissible for pulse widths up to 20 ns. 4. this parameter is sampled and not 100% tested. typ. 60 ma ___ ce = oe = v il , we = v ih , all i/o's = open, inputs = v cc = 5.5v supply current i cc
p6c28c64 page 3 of 11 document # eeprom101 rev a ac electrical characteristics?read cycle (v cc = 5v 10%, all temperature ranges) (2) min max min max min max min max t avav read cycle time 200 250 300 350 ns t avqv address access time 200 250 300 350 ns t el qv chip enable access time 200 250 300 350 ns t olqv output enable access time 100 100 100 100 ns t el qx chip enable to output in low z10101010ns t ehqz chip disable to output in high z 80808080ns t olqx output enable to output in low z 10 10 10 10 ns t ohqz output disable to output in high z 80 80 80 80 ns t avqx output hold from address change0000ns t pu chip enable to power up time 250 250 250 250 ns t pd chip disable to power down time 50 50 50 50 ns -300 -350 unit symbol parameter -200 -250 timing waveform of read cycle
p6c28c64 page 4 of 11 document # eeprom101 rev a ac characteristics?write cycle (v cc = 5v 10%, all temperature ranges) (2) min max min max min max min max t whwl1 t ehel 1 write cycle time 10 10 10 10 ms t avel t avwl address setup time 20 20 20 20 ns t el a x t wlax address hold time 150 150 150 150 ns t wlel t el wl write setup time 0000ns t wheh write hold time 0000ns t ohel t ohwl oe setup time 20 20 20 20 ns t whol oe hold time 20 20 20 20 ns t el eh t wlwh we pulse width 150 150 150 150 ns t dv eh t dv wh data setup time 50 50 50 50 ns t ehdx t whdx data hold time 10 10 10 10 ns t ehel 2 t whwl2 byte load cycle time 0.2 2 0.2 2 0.2 2 0.2 2 s t el wl ce setup time 1111s t ov hwl output setup time 1111s t ehwh ce hold time 1111s t whoh oe hold time 1111s t oha v erase time 200 200 200 200 ms t wlwh2 chip erase time 150 150 150 150 ns v h high voltage for chip clear 1213121312131213v -300 -350 unit symbol parameter -200 -250
p6c28c64 page 5 of 11 document # eeprom101 rev a timing waveform of byte write cycle ( ce ce ce ce ce controlled) timing waveform of byte write cycle ( we we we we we controlled)
p6c28c64 page 6 of 11 document # eeprom101 rev a timing waveform of page write cycle timing waveform of chip clear cycle
p6c28c64 page 7 of 11 document # eeprom101 rev a write sequence for software data protection software sequence to de-activate software data protection
p6c28c64 page 8 of 11 document # eeprom101 rev a ac test conditions input pulse levels gnd to 3.0v input rise and fall times 10ns input timing reference level 1.5v output timing reference level 1.5v output load see fig. 1 truth table mode ce oe we i/o read v il v il v ih d out chip clear v il v h v il x byte write v il v ih v il d in write inhibit x v il xhigh z/d out write inhibit x x v ih high z/d out standby v ih xxhigh z figure 1. output load
p6c28c64 page 9 of 11 document # eeprom101 rev a ordering information endurance device minimum endurance p6c28c64 10,000 cycles (standard) p6c28c64x 100,000 cycles (high endurance)
p6c28c64 page 10 of 11 document # eeprom101 rev a pkg # # pins symbol min max a 0.060 0.075 a1 0.050 0.065 b1 0.022 0.028 d 0.442 0.458 d1 d2 d3 - 0.458 e 0.540 0.560 e1 e2 e3 - 0.558 e h j l 0.045 0.055 l1 0.045 0.055 l2 0.075 0.095 nd ne l6 32 0.300 bsc 0.150 bsc 0.020 ref 7 9 0.400 bsc 0.200 bsc 0.050 bsc 0.040 ref rectangular leadless chip carrier pkg # # pins symbol min max a-0.232 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d-1.490 e 0.500 0.610 ea e l 0.125 0.200 q 0.015 0.060 s1 0.005 - s2 0.005 - c5-1 28 (600 mil) 0.600 bsc 0.100 bsc side brazed dual in-line package (600 mils)
p6c28c64 page 11 of 11 document # eeprom101 rev a revisions document number : eeprom101 document title : p6c28c64 8k x 8 eeprom rev. issue date orig. of change description of change or jul-06 jdb new data sheet a may-07 jdb renamed device from p5c164 to p6c28c64

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